Eugenio Tamura

Departamento de Electrónica y Ciencias de la Computación
3218200
Ext. 8253
  • 2008: Doctor in Computer Engineering, Polytechnic University of Valencia, Valencia, Spain.
  • 2005: Master’s in Computer Engineering, , Polytechnic University of Valencia, Valencia, Spain.
  • 1990: Bachelor in Electronics Engineer, Universidad del Cauca, Popayán, Colombia.
  • 1995-Present: Associate Professor, Department of Electronics and Computer Science, Engineering School, Pontificia Universidad Javeriana, Cali, Colombia.
  • 1994: Part time Instructor, Engineering School, Pontificia Universidad Javeriana, Cali, Colombia.
  • 1990: Research Assistant, Electronics Engineering division, Universidad del Cauca, Popayán, Colombia.

Professor Tamura’s research interest is primarily based on custom computing. In particular, dealing with specialized computing platforms tailored to tackle specific applications that are otherwise impossible to solve with conventional, off-the-shelf computing platforms. Custom computer architectures, including parallel systems, hardware accelerators, and reconfigurable hardware platforms, are able to adapt to problems that are not amenable to conventional computers. His contributions have been focused in improving the estimation of predictability in real-time embedded systems, by designing customized locking caches and techniques to choose the instructions that should be locked to maximize performance. He is currently working on distributed computing architectures and adaptive hardware.

Currently Funded Research

  • Adaptive Systems using (Partial) Reconfigurable Computing.
  • High-Level Synthesis.
  • Common Information Model, CIM, for EPSA (grant: EPSA).
  • Abdul Hissami, Alberto Pretel, E. Tamura. A Numerical Solution for Wootters Correlation. Communications in Computer and Information Science. Volume 485, pp. 221-235. Springer, 2014
  • Antonio Martí-Campoy, Francisco Rodríguez-Ballester, Eugenio Tamura Morimitsu, Rafael Ors. An algorithm for deciding minimal cache sizes in real-time systems. Proceedings of the 13th annual conference on Genetic and evolutionary computation. Pp. 1163-1170. ACM, 2011.
  • Antonio Martí Campoy, Eugenio Tamura, Francisco Rodríguez-Ballester, Juan José Serrano. Parallel Implementation of a Genetic Algorithm Using a Grid. Proceedings of The 2009 International Conference on Grid Computing & Applications. Pp. 92-98. CSREA Press, 2009.
  • E Tamura, JV Busquets-Mataix, A Martí Campoy. Towards predictable, high-performance memory hierarchies in fixed-priority preemptive multitasking real-time systems. Proceedings of the 15th International Conference on Real-Time and Network Systems, RTNS’07. Institut National Polytechnique de Lorraine, pp. 75-84, 2007.
  • A Martí Campoy, Eugenio Tamura, S Saez, Francisco Rodríguez, José V Busquets-Mataix. On using locking caches in embedded real-time systems. Embedded Software and Systems, pp. 150-159. Springer, 2005.